by Alex Kluge. Published: 30 October 2014

In September, the first prototypes of the SAMPA ASIC were produced and delivered to the development team in the University of Sao Paolo (USP). The images show the ASICs produced in a 130 nm CMOS technology. The project has been supported by FAPESP (Fundação de Amparo de Pesquisa do Estsdo de São Paulo) and is coordinated by Prof. Wilhelmus Van Noije (USP), Brazil.

The SAMPA is the read-out ASIC for the Time Projection Chamber (TPC) and Muon Chambers (MCH) designed for the detector rate upgrade to be installed after the long shut down 2 in 2018/19. The ASIC combines the functionality of signal amplification, analog-to-digital conversion and digital signal processing with continuous, trigger-less read-out capability. This allows the read-out of all particle hits in a continuous data stream without the need of a trigger signal. The implementation of this feature is a first for large TPCs and vital for the rate upgrade of the entire ALICE experiment.

Front-end channels

ADC and SLVS driver

The recently delivered prototypes contain building blocks of all the final elements; the front-end amplifiers, the analog-to-digital converters, designed in a state-of-the art fashion in order to reduce the power consumption, and three full front-end channels including the digital signal and read-out processor. The prototypes are presently under test and, as shown in the picture, first results of the amplifier show very good behaviour. In the next few weeks all elements will be tested by the development team and in addition also already by the TPC and MCH detector teams with real detectors in order to give immediate feedback to the ASIC designers.

Full read-out channels containing front-end, ADC and digital signal processor

Measurement of the front-end amplifier

Furthermore, the design team is already working on the full 32-channel ASIC with the final size and specifications. A timely delivery of the ASICs to the detector groups in 2016 is required for an installation of all 51000 ASICs in the detector in 2018.

The first important milestone for this challenging key element of the ALICE upgrade is now at hand.

Layout of the 2nd prototype which includes all 32 channels and full functionality.